Display control device and method for generating display data to display images in gray scale

ABSTRACT

In a flat type display device, a display control device comprising display data generation means for sequentially comparing scale number of a display picture element and each frame number of frames necessary to display images in gray scale, and generating display data for the display picture element based on the comparison result.

BACKGROUND OF THE INVENTION

The present invention relates to a display control device for storingcontents such as characters, line drawings or photographs on books,newspapers or magazines in an electronic, optical or magnetic recordingmedium, reading them out from the recording medium and displaying themin a flat type display device.

Recently, portable terminal devices with a display control device forstoring character data or graphic data including gray scale such ascharacters, line drawings or photographs on books, newspapers ormagazines in an electronic, optical or magnetic recording medium,reading them out from the recording medium and displaying them in a flattype display device such as a liquid crystal display device or the likeare researched and developed. These kinds of portable terminal devicescomprise a display control device for storing data recorded in arecording medium in a semiconductor memory such as Video RAM, readingout the stored data and display the data with gray scale images in aflat type display device.

For such a display device, color display devices using a color CRT arepopular. Recently, however, to satisfy needs for miniaturization ofdevices, laptop type or notebook type small devices are being produced.For display devices of the laptop type or notebook type small devices,liquid crystal display devices or plasma display devices not CRT areused, because the former have advantages on lightening and thinningdevices.

By the way, liquid crystal display devices or plasma display devices areused as monochrome display device, because developed color displaydevices of these types are so far expensive. Details of an art forconverting color display data to monochrome display data on the liquidcrystal display devices or plasma display devices are disclosed on theJapanese Patent Laid Open No. 299020 (1990) and the Japanese Patent LaidOpen No. 85687 (1991).

To display images in gray scale on a liquid crystal display device,recorded data are converted to weighted bit patterns and stored in aVideo RAM. For the weighting of 8 gray scale display, for example, thedisplay data of a picture element is patterned by 3 bit length data suchas scale number 1 000!, scale number 2 001!, . . . , scale number 8111!. When storing the scale data in the Video RAM, respective dataareas such as second, first and 0-th bit planes of 3 bit length patternare separately stored. A portable terminal device with a display controldevice for generating display data reads out the bit pattern stored inthe Video RAM and generates scale display data.

The scale display data for a liquid crystal display is generated bydecimating the data read out from the Video RAM. For the method of datadecimation, it is possible to decimate frames in point of time from theread out data, then convert the result to display data. Displaying onthe liquid crystal display device is performed by conducting a displaypicture element ON/OFF. The frame decimation is to control this ON/OFFoperation in point of time.

FIG. 10 shows an example of 8 gray scale display of a picture element.In this case, 7 frames from frame number 1 to frame number 7 form adisplay cycle. For example, scale number 3 is displayed on a liquidcrystal display device when the scale display data 0000011! is sent inpoint of time to the liquid crystal display device. Namely, frame number1 to frame number 5 at the picture element position are OFF and framenumber 6 and frame number 7 at the picture element position are ON.

In a display device using a liquid crystal display device, aninterference between frequency of a fluorescent lamp and frequency ofdisplay data of the liquid crystal display device causes flickering. Inaddition, in a display control device controlling gray scale display ofthe liquid crystal display device, flickering of screen may occur due tothe drop of frame frequency of display data or arrangement of displaydata. The reason is that eyes of user recognize ON/OFF of the displaypicture element.

For example, a case of outputting the same scale display data in an areais considered. In this case, if the above-mentioned scale number 3display data is output, all picture elements in this area aresimultaneously conducted ON/OFF in the same cycle. Eyes of userrecognize this ON/OFF, thus flickering of screen is recognized. Todecrease this flickering, the pattern of display data may be changed.For example, the pattern 0000011! of the above-mentioned display data ischanged to 0010001! so as to increase frame frequency of display data.Then, the pattern of display data is changed for each line and eachpicture element. In the horizontal direction display data, the patternof the display data is changed for each picture, for example, the oddnumber picture element on a display screen is changed to 0010001! andthe even number picture element on a display screen is changed to1000100!. In the same way as this, the pattern of vertical directiondisplay data is also changed. In the vertical direction, the pattern ofthe display data is changed according to the line number.

FIG. 8 shows a construction of a conventional display control device20'. As shown in FIG. 8, the conventional display control device 20' isprovided between a Video RAM 22 for storing weighted bit data for grayscale display and a flat type display device 24 (a liquid crystaldisplay device, in the present embodiment). It reads out data stored inthe Video RAM, conducts decimation and outputs the result to the liquidcrystal display device 24.

The display control device 20' comprises a first to third latch circuits26, 27 and 28, a scale data generation section 30, an address generationsection 32, a display control section 34, a control section 36', a scaletable register section 38, decimation section 40' and a display datalatch section 42. Display data that was output from the liquid crystaldisplay device 24 is data decimated based a line number, a linediscriminant signal and a picture element discriminant signal. The datato be decimated is stored in the scale table register section 38 ofwhich construction is explained later. The data is read out from theVideo RAM 22 and converted to scale data. This data selects a registerin which an arbitrary value is written in the scale table registersection 38. Based on this value, the data is decimated.

The Video RAM 22 is a semiconductor memory in which the data that hasbeen weighted and separated for each bit plane is stored for each plane.In the present embodiment, three bit planes, that is, plane 3, plane 2and plane 1 are provided. The first to third latch circuits 26, 27 and28 respectively read out data of plane 3 to plane 1, and latch them. Thescale data generation section 30 generates scale data for each planefrom data latched in the latch circuits 26 to 28.

The address generation section 32 generates a read address of the VideoRAM 22. The display control section 34 conducts reading from the VideoRAM 22, control of the control section 36' and control of the liquidcrystal display device 24. The control section 36' outputs controlsignals for decimation such as an odd/even number picture elementdiscriminant signal, an odd/even line discriminant signal and a framenumber to the decimation section 401. The scale table register section38 connected with the CPU bus comprises four units of register of 8 bitlength in which an arbitrary value can be written.

The decimation section 40' decimates register set values supplied fromthe scale table register 38, based on the frame number supplied from thecontrol section 36', the odd/even number line discriminant signal, theodd/even number picture element discriminant signal and the scale datasupplied from the scale data generation section 30, and outputs displaydata to the display data latch section 42. The display data latchsection 42 latches display data output from the decimation section 40',and outputs the data to the liquid crystal display device 24 at a timingof a control signal that is output from the display control section 34.The liquid crystal display device 24 receives the display data andconducts ON/OFF of the display picture element of the liquid crystalpanel at the timing of the control signal supplied from the displaycontrol signal 34.

FIG. 9 shows detailed constructions of the scale table register section38 and the decimation section 40' that are shown in FIG. 8. Here, theexample where 8 picture elements of the display screen are processed asa unit is explained.

The scale table register section 38 comprises a first to fourth scaletable registers 51 to 54. The decimation section 40' comprises a firstto eighth decimation units 61' to 68'. A signal writing data to thefirst to fourth scale registers 51 to 54 is supplied from a CPU (notshown).

The first to eighth decimation units 61' to 68' have the sameconstruction, so only a detailed construction of the first decimationunit 61' is shown in this figure. The first decimation unit 61'comprises a first to fourth frame decimation sections 71 to 74, a firstto fourth scale multiplexer sections 76 to 79, a first and second linedecimation sections 81 and 82, and a picture element decimation section84.

The first scale table register 51 is a register in which a scale tableof display picture element of which line number is odd and pictureelement number is odd is stored. The second scale table register 52 is aregister in which a scale table of display picture element of which linenumber is odd and picture elements number is even is stored. The thirdscale table register 53 is a register in which a scale table of displaypicture element of which line number is even and picture elements numberis odd is stored. The fourth scale table register 54 is a register inwhich a scale table of display picture element of which line number iseven and picture elements number is even is stored.

Based on a frame number as a selection signal, the first to fourth framedecimation sections 71 to 74 respectively select 8 scale table data ofthe same frame number from data of 8 scale 8 bit length (7 bits forframes and 1 bit for dummy) supplied from the first to fourth scaletable registers 51 to 54. The selected scale table data is a data of 8bit length (8 scale×1 frame). Each of the first to fourth framedecimation sections 71 to 74 comprises 8 multiplexers, construction ofeach of them is of 8:1.

Based on a scale data as a selection signal, the first to fourthmultiplexer sections 76 to 79 respectively select a data of 1 scale and1 frame from scale table data of 8 scale 1 bit length (1 bit frame)supplied from the first to fourth frame decimation sections 71 to 74.The selected data is a data of 1 bit length (1 scale×1 frame). Each ofthe first to fourth multiplexer sections 76 to 79 comprises amultiplexer of 8:1.

Based on an odd/even number line discriminant signal for discriminatingan odd number line and even number line on the display screen as aselection signal, the first and second line decimation sections 81 and82 select data supplied from the first to fourth scale multiplexersections 76 to 79. The data supplied from the first and third scalemultiplexer sections 76 and 78 are the data decimated in the first andthird scale table registers 51 and 53 which are respectively displayedupon odd number line/odd number picture element on the display screenand even number line/odd number picture element on display screen. Thedata supplied from the second and fourth scale multiplexer sections 77and 79 are the data decimated in the second and fourth scale tableregisters 52 and 54 which are respectively displayed upon odd numberline/even number picture element on the display screen and even numberline/even number picture element on the display screen. The second linedecimation section 82 selects a data to be displayed when the number ofthe picture element of the display screen is even. The selected data isof 1 bit length. Each of the first and second line decimation sections81 and 82 comprises a multiplexer of 2:1.

Based on an odd/even number picture element discriminant signal fordiscriminating an odd number picture element and an even number pictureelement on the display screen as a selection signal, the picture elementdecimation section 84 selects a 1 bit length display data from oddpicture element display data supplied by the first line decimationsection 81 and even number picture element display data supplied by thesecond line decimation section 82. The selected data is of 1 bit length,the picture element decimation section 84 consists of a multiplexer of2:1.

Returning to FIG. 8, the data read out from the Video RAM 22 is latchedfor each plane in the latch circuits 26, 27 and 28. The data of whicheach plane data is latched in the first to third latch circuits 26, 27and 28 are converted to a scale data of which most significant data isplane 3 data and least significant data is plane 1 data. The convertedscale data is output to the decimation section 40'. Here, each planedata is of 8 bit length because 8 picture elements of the display screenis a processing unit. The scale data generation section 30 outputs 8kinds of scale data of 3 bit length respectively, that is, totally 24bits data.

As FIG. 9 shows, each of the first to eighth decimation units 61' to 68'is supplied by a 3 bit length scale data, a control signal output fromthe display control section 34 and totally 5 bit data, that is, a 1 bitlength odd/even number picture element discriminant signal fordiscriminating odd number picture element and even number pictureelement of the display screen, a 1 bit length odd/even number linediscriminant signal for discriminating odd number line and even numberline of the display screen and 3 bit length frame number. Each of thefirst to eighth decimation units 61' to 68' conducts decimation tooutput 1 bit length display data, as mentioned above. The total 8 bitsdisplay data is latched in the display data latch section 42 and outputto the liquid crystal display device 24 at a display timing controlledby the display control section 34.

As shown in FIG. 11, each data of the first to fourth scale tableregisters 51 to 54 is of 8 scale 8 bit length. In F10 to F87, displaydata are stored. The first to fourth frame decimation sections 71 to 74respectively frame decimates data of the first to fourth scale tableregisters 51 to 54. The first to fourth scale multiplexer sections 76 to79 respectively select data from data supplied by the first to fourthframe decimation sections 71 to 74, using scale data. The results areoutput to the first and second line decimation sections 81 and 82.

FIG. 12 shows an example of frame decimation when the frame number is 1and data construction selected from the scale table register. The dataselected in the first to fourth scale multiplexer sections 76 to 79 is adata stored in F31, for example.

When displaying images in gray scale data on the screen of the liquidcrystal display device 24, using set values of the scale table registers51 to 54 that are rewritten by a software, the above-mentionedconventional display control device 20' controls ON/OFF of the pictureelements of the liquid crystal display device 24. In addition, to reduceflickering, it recognizes display positions and frame numbers of oddnumber picture elements, even number picture elements, odd number linesand even number lines, and controls ON/OFF of the picture elements ofthe liquid crystal display device 24.

In such a conventional display device, there are some problems such asnecessity of set data in the scale table registers 51 to 54 even ifthere is no need to control ON/OFF of the picture elements of the liquidcrystal display device 24 and increasing of circuit scale of the scaletable register section 38 because of the register construction.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide an art enabling togenerate display data without using registers for ON/OFF control of aflat type display device.

It is another object of the present invention to provide an art enablingto reduce the circuit size by using size comparators for ON/OFF controlof the flat type display device.

The present invention is achieved by a display control device forcontrolling display by generating display data to display images in grayscale from scale data representing scale number of a predetermineddisplay picture element and each frame data representing framesnecessary for displaying images in gray scale in a flat type displaydevice, the display control device comprising display data generationmeans for generating display data of the display picture element bysequentially comparing scale number representing the scale data and eachframe number representing the frame data.

Furthermore, the present invention is achieved by a method forgenerating display data to display images in gray scale in a flat typedisplay device comprising steps of: generating display data of thedisplay picture element by sequentially comparing scale number of adisplay picture element and each frame number of frames necessary todisplay images in gray scale.

The present invention features to generate display data by comparing aframe number and a scale number.

As a result, it enables to generate display data using a small sizecircuitry construction.

In addition, the present invention, that is, to compare a frame numberand a scale number using a conversion table for outputting differentframe numbers for respective lines of a display screen, not using setvalues with a software, enables to reduce flickering of the liquidcrystal display device.

BRIEF DESCRIPTION OF THE DRAWINGS

This and other objects, features and advantages of the present inventionwill become more apparent upon a reading of the following detaileddescription and drawings, in which:

FIG. 1 is a block diagram of the first embodiment of the display controldevice of the present invention;

FIG. 2 is a block diagram of a sample configuration of a display datageneration section of the display control device shown in FIG. 1;

FIG. 3 is a truth table for explaining the operation of a sizecomparator configuring the display data generation section shown in FIG.2 and FIG. 4;

FIG. 4 is a truth table for explaining the operation of the display datageneration section shown in FIG. 2;

FIG. 5 is a block diagram of construction of the display control deviceof the second embodiment;

FIG. 6 is a truth table for explaining the operation of the frame numbermodification table in the display data generation section shown in FIG.5;

FIG. 7 is a truth table for explaining the operation of the display datageneration section shown in FIG. 5;

FIG. 8 is a block diagram of construction of a conventional displaycontrol device;

FIG. 9 is a block diagram of a sample of construction of a scale tableregister section and a decimation section of the display control sectionshown in FIG. 8;

FIG. 10 is a drawing showing a relation between scale display anddisplay data;

FIG. 11 is a data format table for explaining data configuration of thescale table in FIG. 9; and

FIG. 12 is a data format table for explaining data configuration that isinput to the frame decimation section in FIG. 9.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The first embodiment of the present invention is explained.

FIG. 1 is a block diagram of a display control device 20 of the firstembodiment.

The display control device 20 comprises a first to third latch circuits26, 27 and 28, a scale data generation section 30, an address generationsection 32, a display control section 34, a control section 36, adisplay data generation section 40 and a display data latch section 42.

In a Video RAM 22, weighted data are stored, being separated for eachbit plane.

The latch circuits 26 to 28 are respectively called as plane 3 latchcircuit, plane 2 latch circuit and plane 1 latch circuit. They latchdata read out from the Video RAM 22. The latch circuits 26 to 28respectively latch 8 bit length data.

The scale data generation section 30 generates, for each plane, 8picture element scale data from data latched in the latch circuits 26 to28. Each scale data is of 3 bit length data, 000! for scale number 1,001! for scale number 2, 010! for scale number 3, etc., for example.

The address generation section 32 generates read addresses of the VideoRAM 22.

The display control section 34 reads out data from the Video RAM 22 andcontrols the liquid crystal display device 24.

The control section 36 outputs frame data. The frame data is of 3 bitlength data signal, 000! for frame number 0, 001! for frame number 1,010! for frame number 2, or the like.

The display data generation section 40 generates display data to beoutput to the liquid crystal display device 24 using the scale data andthe frame data.

The display data latch section 42 latches display data supplied from thedisplay data generation section 40 and outputs data to the liquidcrystal display device 24 at a timing of a control signal supplied fromthe display control section 34.

The liquid crystal display device 24 conducts ON/OFF of the displayelements of the liquid crystal panel using the input display data at thetiming of the control signal supplied from the display control section34.

FIG. 2 shows an example of the display data generation section 40 shownin FIG. 1.

In this example, the display data generation section 40 shown in FIG. 2processes 8 picture elements among elements of a display screen as aunit. The display data generation section comprises a first to eighthdisplay data generation units 61 to 68, each of them is of 3 bit length.

As shown in FIG. 2, each of the first to eighth display data generationunits 61 to 68 comprises a size comparator. Each size comparator issupplied by 3 bit length scale data representing scale number of onepicture element of the display element from the scale data generationsection 30 and 3 bit length frame data from the control section 36.Then, each size comparator compares a scale number and a frame number,and outputs 1 bit length display data as a result. As 8 picture elementsare processed as a processing unit in the present embodiment, thedisplay data generation section 40 outputs 8 bit length display data.Like this example of 8 gray scale displaying, one scale data (one scalenumber) and 8 frame numbers from 0 to 7 are sequentially compared anddisplay data is output.

FIG. 3 shows a truth table of signals output from the size comparatorsof the first to eighth display data generation units 61 to 68. An outputfrom each size comparator is a signal value output from an outputterminal of A>B. For example, if comparing scale number 3 of which scaledata is 010! and frame number 5 of which frame data is 101!, A2<B2,A1>B1 and A0<B0, since A2=0, A1=1, A0=0, B2=1, B1=0 and B0=1. Therefore,0! is output from the A>B, since A2<B2.

Returning to FIG. 1, an operation of the display control device of thepresent invention is explained.

The data read out from the Video RAM 22 is latched for each plane in thefirst to third latch circuits 26, 27 and 28. The scale data generationsection 30 converts each plane data latched in the first to third latchcircuits 26, 27 and 28 to 3 bit length 8 picture element scale data soas the plane 3 data may become a most significant data and the plane 1data may become least significant data. The converted scale data isoutput to the display data generation section 40.

Each bit plane of the 8 picture element scale data is separately inputto the first to eighth display data generation units 61 to 68. The firstto eighth display data generation units 61 to 68 compares the scalenumber and frame number supplied from the control section 36, outputsdisplay data according to the truth table shown in the above-mentionedFIG. 4. The display data generation section 40 compiles outputs from thefirst to eighth display data generation units 61 to 68 and outputs 8 bitlength display data.

This 8 bit length display data is latched in the display data latchsection 42 and output to the liquid crystal display device 24 at atiming of a control signal output by the display control section 34.

Next, the second embodiment is explained.

FIG. 5 shows the second embodiment of the display data generationsection shown in FIG. 1. Here, the display data generation section ismarked by a reference code, 40A. This display data generation section40A also processes 8 picture elements as a processing unit in thisembodiment.

The display data generation section 40A comprises the first to eighthdecimation units 61 to 68, a frame number conversion table 86 and aninverter 88.

The control section 36 outputs an odd/even number line discriminantsignal for discriminating an odd number line and even number line, framedata and so on. Here, the odd/even number line discriminant signal is of1 bit length data signal, 1! for an odd number line or 0! for an evennumber line.

The control section 36 supplies total 4 bit data of an odd/even numberline discriminant signal for discriminating odd number line and evennumber line on a display screen of 1 bit length and 3 bit length framedata to the frame number conversion table 86. According to theconversion rule shown in FIG. 6, the frame number conversion table 86converts the received frame number data to 3 bit length data that aredifferent in an odd number line and an even number line and outputs aresult.

For example, if the frame number is 0 (description in form of 3 bitlength frame number data is 000!) and an odd/even number linediscriminant signal indicates an odd line (description in form of 1 bitlength odd/even number line discriminant signal is 1!), the convertedframe number 0 (description in form of 3 bit length frame number data is000!) is output. Similarly to this, if the frame number is 0(description in form of 3 bit length frame number data is 000!) and anodd/even number line discriminant signal indicates an even line(description in form of 1 bit length odd/even number line discriminantsignal is 0!), the converted frame number 4 (description in form of 3bit length frame number data is 100!) is output.

The inverter 88 inverts frame number data from the frame numberconversion table 86 and output a result. Here, "invert" means to inverteach bit value in 3 bits. For example, if inverting 3 bit length data101!, it becomes a 3 bit length data 010!.

Each of the first, third, fifth and seventh display data generationunits 61, 63, 65 and 67 generates display data of odd number pictureelement of a display screen. The scale data generation section 30supplies 3 bit length scale data representing scale number of onepicture element of the display screen and 3 bit length frame datarepresenting frame number converted according to the frame numberconversion table 86 to the display data generation units 61, 63, 65 and67.

Each of the second, fourth, sixth and eighth display data generationunits 62, 64, 66 and 68 generates display data of even number pictureelement of a display screen. The scale data generation section 30supplies 3 bit length scale data representing scale number of onepicture element of the display screen and 3 bit length frame datarepresenting frame number inverted by the inverter 88 to the second,fourth, sixth and eighth display data generation units 62, 64, 66 and68. Here, the comparators used in the display data generation units 61to 68 are the same as comparators used in the first embodiment.

FIG. 7 shows a truth table of the display data section 40A shown in FIG.5.

Next, an operation of the second embodiment is explained.

The data read out from the Video RAM 22 is latched for each plane in thefirst to third latch circuits 26, 27 and 28. The scale data generationsection 30 converts each plane data latched in the first to third latchcircuits 26, 27 and 28 to 3 bit length 8 picture element scale data soas the plane 3 data may become a most significant data and the plane 1data may become least significant data. The converted scale data isoutput to the display data generation section 40.

The control section 36 outputs an odd/even number line discriminantsignal for discriminating a line on which 8 picture elements are alignedand frame number data.

The display data generation section 40A is input by 8 scale data, anodd/even number line discriminant signal and frame number data.

Each scale data is input to each of the first to eighth display datageneration units 61 to 68.

The frame data and the odd/even number line discriminant signal areinput to the frame number conversion table 86.

The frame number conversion table 86 converts frame number according toa conversion rule shown in FIG. 6. If the odd/even number linediscriminant signal indicates even number and the frame data indicatesframe number 4, it convert the frame number to 0 and outputs it, forexample. Namely, the frame data 100! is converted to 000! and output.

The converted frame number data is output to the inverter 88 and thedisplay data generation units 61, 63, 65 and 67.

The inverter 88 additionally inverts the converted frame number data.Here, the frame number data 000! is inverted to 111!, for example, andit outputs the inverted data to the display data generation units 62,64, 66 and 68.

The first to eighth display data generation units 61 to 68 compares ascale number and a frame number from the control section 36 and outputsdisplay data according to the truth table shown in above-mentioned FIG.4. The display data generation section 40A outputs 8 bit length displaydata according to the truth table in FIG. 7.

The 8 bit length display data is latched in the display data latchsection 42 and output to the liquid crystal display device 24 at atiming of a control signal output from the display control section 34.

It is not necessary to say that the present invention explained in theembodiment is not limited within the embodiment. In addition, it can bemodified or changed within the limitation of the present invention. Forexample, a liquid crystal display device is explained in the embodiment,it can be replaced with any flat type display device such as a plasmadisplay device.

Moreover, the display data generation section processes 8 pictureelements of a display screen as a processing unit in the embodiment.However, it is possible to use 2^(n) (n is an integer of n≧0) pictureelements of a display screen such as 16 picture elements as a processingunit.

Furthermore, it is possible to use frame number data output from theinverter 88 for odd number picture element and frame number data outputfrom the frame number conversion table 86 for even number pictureelement.

What is claimed is:
 1. A display control device for controlling adisplay by generating data to display images in gray scale from scaledata representing a scale number of a predetermined display pictureelement and each frame data representing frames necessary for displayingimages in gray scale in a flat type display device, said display controldevice comprising:display data of said display picture element bycomparing a scale number representing said scale data and each framenumber representing said frame data, in sequential frame number order; aplurality of latch circuits for latching data read out from a video RAMin which bit data weighted for displaying images in gray scale arestored; scale data generation means for generating scale datarepresenting frame number of a predetermined display picture elementfrom said bit data latched in said latch circuit; means for outputtingeach frame data representing frame number of said display pictureelement; control means for outputting a timing signal; display datalatch means for latching display data output from said display datageneration means and outputting said display data to said flat typedisplay device according to said timing signal; and display generationmeans, including a comparator for comparing said scale number and eachsaid frame number of said display picture element, for outputtingdisplay data to turn said display picture element ON when said scalenumber is larger than said frame numbers, OFF when said scale number isequal to said frame number, and OFF when said scale number is smallerthan said frame number.
 2. The display control device of claim 1,wherein said flat type display device is a liquid crystal displaydevice.
 3. The display control device of claim 1, wherein said flat typedisplay device is a plasma display device.
 4. The display control deviceof claim 1, further comprising scale data generation means forgenerating scale data of a plurality of display picture elements, andwherein said display data generation means processes a plurality ofdisplay picture elements as a processing unit and includes a pluralityof comparators, each of said comparators compares one of said pixelelements scale number and said each frame number.
 5. The display controldevice of claim 4, wherein, each of said comparators compares said scalenumber and said each frame number and outputs display data to turn saiddisplay picture element ON when said scale number is larger than saidframe number, OFF when said scale number is equal to said frame number,and OFF when said scale number is smaller than said frame number.
 6. Thedisplay control device of claim 4, further comprising:said scale datageneration section for generating 2^(n) (n is an integer of n≧0) scaledata of 2^(n) display picture elements; and said display data generationmeans including 2^(n) units of said comparators for processing 2^(n)display picture elements as a processing unit.
 7. The display controldevice of claim 1, further comprising:means for outputting adiscriminant signal for discriminating an odd number line and an evennumber line on a display screen of said flat type display device; firstframe data conversion means for converting contents of a frame data sothat a frame number of said frame data when a picture elementcorresponding to said frame data is on an odd number line is differentfrom a frame number of said frame data when said picture elementcorresponding to said frame data is on an even number line, based onsaid discriminant signal; second frame data conversion means forconverting said converted frame data to another different frame data sothat each bit of said converted frame is inverted; and a scale datageneration section for generating a plurality of scale data; whereinsaiddisplay data generation means comprises: a plurality of firstcomparators for comparing each frame number of said frame data convertedin said first frame data conversion means and scale number of said scaledata; and a plurality of second comparators for comparing each framenumber of said frame data converted in said second frame data conversionmeans and scale number of said scale data.
 8. A display control devicefor controlling a display by generating display data to display imagesin a gray scale from scale data representing a scale number of apredetermined display picture element and each frame data representingframes necessary for displaying images in gray scale in a flat typedisplay device, said display control device comprising display datageneration means for generating display data of said display pictureelement by sequentially comparing a scale number representing said scaledata and each frame number representing said frame data, furthercomprisingmeans for outputting a discriminant signal for discriminatingan odd number line and an even number line on a display screen of saidflat type display device; first frame data conversion means forconverting contents of a frame data so that a frame number of said framedata when a picture element corresponding to said frame data is on anodd number line is different from a frame number of said frame data whensaid picture element corresponding to said frame data is on an evennumber line, based on said discriminant signal; second frame dataconversion means for converting said converted frame data to anotherdifferent frame data so that each bit of said converted frame data isinverted; and a scale data generation section for generating a pluralityof scale data; wherein said display data generation means comprises:aplurality of first comparators for comparing each frame number of saidframe data converted in said first frame data conversion means and scalenumber of said scale data; and a plurality of second comparators forcomparing each frame number of said frame data converted in said secondframe data conversion means and scale number of said scale data; furthercomprising said first comparators and said second comparators, each ofsaid comparators compares said scale number and said each frame number,and outputs display data to turn said display picture element ON whensaid scale number is larger than said frame number, OFF when said scalenumber is equal to said frame number, and OFF when said scale number issmaller than said frame number.
 9. A display control device forcontrolling a display by generating display data to display images in agray scale from scale data representing a scale number of apredetermined display picture element and each frame data representingframes necessary for displaying images in gray scale in a flat typedisplay device, said display control device comprising display datageneration means for generating display data of said display pictureelement by sequentially comparing a scale number representing said scaledata and each frame number representing said frame data, furthercomprisingmeans for outputting a discriminant signal for discriminatingan odd number line and an even number line on a display screen of saidflat type display device; first frame data conversion means forconverting contents of a frame data so that a frame number of said framedata when a picture element corresponding to said frame data is on anodd number line is different from a frame number of said frame data whensaid picture element corresponding to said frame data is on an evennumber line, based on said discriminant signal; second frame dataconversion means for converting said converted frame data to anotherdifferent frame data so that each bit of said converted frame data isinverted; and a scale data generation section for generating a pluralityof scale data; wherein said display data generation means comprises:aplurality of first comparators for comparing each frame number of saidframe data converted in said first frame data conversion means and scalenumber of said scale data; and a plurality of second comparators forcomparing each frame number of said frame data converted in said secondframe data conversion means and scale number of said scale data; whereinsaid second frame data conversion means comprises an inverter forinverting said frame data.
 10. A display control device for controllinga display by generating display data to display images in a gray scalefrom scale data representing a scale number of a predetermined displaypicture element and each frame data representing frames necessary fordisplaying images in gray scale in a flat type display device, saiddisplay control device comprising display data generation means forgenerating display data of said display picture element by sequentiallycomparing a scale number representing said scale data and each framenumber representing said frame data, further comprisingmeans foroutputting a discriminant signal for discriminating an odd number lineand an even number line on a display screen of said flat type displaydevice; first frame data conversion means for converting contents of aframe data so that a frame number of said frame data when a pictureelement corresponding to said frame data is on an odd number line isdifferent from a frame number of said frame data when said pictureelement corresponding to said frame data is on an even number line,based on said discriminant signal; second frame data conversion meansfor converting said converted frame data to another different frame dataso that each bit of said converted frame data is inverted; and a scaledata generation section for generating a plurality of scale data;wherein said display data generation means comprises:a plurality offirst comparators for comparing each frame number of said frame dataconverted in said first frame data conversion means and scale number ofsaid scale data; and a plurality of second comparators for comparingeach frame number of said frame data converted in said second frame dataconversion means and scale number of said scale data;wherein said scalegeneration section generates 2.sup.(n+1) (n is an integer of n≧0) scaledata of 2.sup.(n+1) display picture elements.
 11. The display controldevice of claim 10, wherein said display data generation means processes2.sup.(n+1) display picture elements as a processing unit, and saiddisplay generation means includes 2^(n) units of said first comparatorsfor odd picture elements and 2^(n) units of said second comparators foreven picture elements.
 12. The display control device of claim 10,further comprising:said display control device for processing2.sup.(n+1) display picture elements as a processing unit by having2^(n) units of said first comparators for odd number line pictureelements and 2^(n) units of said second comparators for even number linepicture elements.
 13. A display control device for generating displaydata to display images in gray scale in a flat type display device andcontrolling display comprising:a plurality of latch circuits forlatching data read out from a video RAM in which bit data weighted fordisplaying images in gray scale in a flat type display device arestored; scale data generation means for generating scale datarepresenting a scale number for each of a plurality of display pictureelements based on said data latched in said latch circuits; frame dataoutput means for outputting each frame data representing frame numbersof said display picture elements; a plurality of comparators, each ofsaid comparators compares, said scale number and said each frame number,in sequential frame number order, and outputs display data to turn saiddisplay picture element ON when said scale number is larger than saidframe number, OFF when said scale number is equal to said frame number,and OFF when said scale number is smaller than said frame number;control means for outputting a timing signal; display data latch meansfor latching said display data output from said plurality of comparatorsand outputting said display data to said flat type display deviceaccording to said timing signal; wherein said scale data generationmeans further comprises 2^(n) (n is an integer of n≧0) units ofcomparators for generating 2^(n) scale data, and wherein said displaycontrol device processes 2^(n) display picture elements as a processingunit.
 14. A display control device for generating display data todisplay images in gray scale in a flat type display device andcontrolling display comprising:a plurality of latch circuits forlatching data read out from a video RAM in which bit data weighted fordisplaying images in gray scale in a flat type display device arestored; scale data generation means for generating scale datarepresenting a scale number for each of a plurality of display pictureelements based on said data latched in said latch circuits; frame dataoutput means for outputting each frame data representing frame numbersof said display picture elements; means for outputting a discriminantsignal for discriminating an odd number line and an even number line ona display screen of said flat type display device; first frame dataconversion means for converting contents of a frame data so that a framenumber of said frame data when a picture element corresponding to saidframe data is on an odd number line is different from a frame number ofsaid frame data when said picture element corresponding to said framedata is on an even number line, based on said discriminant signal;second frame data conversion means for converting said frame dataconverted with said first frame data conversion means so that every bitof said converted frame data is inverted; a plurality of firstcomparators, each of said first comparators sequentially compares saidscale number and each said frame number of said converted frame data insaid first frame data conversion means, and outputs display data to turnsaid display picture element ON when said scale number is larger thansaid frame number, OFF when said scale number and OFF when said scalenumber is smaller than said frame number; a plurality of secondcomparators, each of saidsecond comparators sequentially compares saidscale number and each frame number of said frame data converted in saidsecond frame data conversion means, and outputs display data to turnsaid display picture element ON when said scale number is larger thansaid frame number, OFF when said scale number is equal to said framenumber, and OFF when said scale number is smaller than said framenumber; control means for outputting a timing signal; and display datalatch means for latching said display data output from said firstcomparators and said second comparators and outputting said display datato said flat type display device according to said timing signal.
 15. Amethod for generating display data to display images in gray scale in aflat type display device comprising steps of:generating display data ofsaid display picture element by comparing a scale number of a displaypicture element and each frame number, in sequential frame number order,of frames necessary to display images in gray scale; generating adiscriminant signal for discriminating an odd number line and an evennumber line on a display screen of said flat type display device; firstframe number conversion step of converting contents of a frame data sothat a frame number of said frame data when a picture elementcorresponding to said frame data is on an odd number line is differentfrom a frame number of said frame data when said picture elementcorresponding to said frame data is on an even number line, based onsaid discriminant signal; second frame number conversion step of furtherconverting said converted frame number to another different framenumber; and generating a plurality of first scale numbers and aplurality of second scale numbers; wherein said display data generationstep comprises steps of:comparing a frame number converted in said firstframe number conversion step and said first scale number; and comparinga frame number converted in said second frame number conversion step andsaid second scale number.
 16. The method of claim 15, wherein saidmethod for generating said display data comprises the steps of:(a)comparing said scale number and said frame number, outputting data toturn said display picture element ON when said scale number is largerthan said frame number, OFF when said scale number is equal to saidframe number, and OFF when said scale number is smaller than said framenumber; and (b) sequentially applying said step (a) to each frame numberof said display picture element.
 17. The method of claim 15, furthercomprising a step of generating scale numbers of a plurality of displaypicture elements, wherein said display data generation step processessaid plurality of display picture elements as a processing unit,compares a scale number of each of said display picture element and eachframe number, in sequential frame number order, and generates displaydata of said each display picture element based on said comparisonresults.
 18. The method of claim 15, wherein said first scale number isa scale number for an odd number line picture element in a flat typedisplay device and said second scale number is a scale number for aneven number line picture element in a flat type display device.